Present methods of producing primary conductor lines on PWB substrates introduce problems, such as the following:
(1) Where copper etching is required, waste disposal becomes a problem;
(2) Where palladium or like high cost catalysts are used, high expense and waste is encountered;
(3) Resolutions are so limited that high density wiring is not feasible;
(4) Space limitations require more conductor density than has heretofore been feasible;
(5) Because of dirt, scratches and undercutting, etching techniques result in lack of adhesion of fine conductor lines to the substrate insulation, reduce line widths that may result in open circuits and cause conductive traces between lines that may result in short circuits;
(6) Resist layers are typically so thin that they do not well serve as dams for limiting spillover or mushrooming of plating conductors;
(7) The necessary thicknesses of conductors are hard to achieve when the conductor line widths become narrow and all the above problems are accentuated; and
(8) The selective cleaning of conductor traces from insulating spaces between lines becomes almost impossible, particularly for high density wiring boards Attempts to sand off resist layer surfaces could not succeed because the standard substrates used are not flat surfaced but have irregular surfaces with indentations of greater than 1 mil (0.001 inch) so that sanding of the surface would not be complete in some places and would damage conductor wiring lines in other places. Also, on high density boards, any contact with very thin width lines can result in catastrophic failure.
High density printed wiring boards (PWB) are considered to be those having conductor lines and spaces of 5 mils (0.005 inches); that is conductors 5 mils wide separated "by 5 mils of insulation spaces. It is very difficult to achieve a high yield when manufacturing such high density boards, owing primarily to the difficulty in achieving photoresist patterns having the required resolution and being well bonded to the base laminate. Another factor limiting the production of very fine conductor lines is the copper foil etching step. Even with copper foil, 0.35 mils thick (1/4 ounce per square foot), there is the problem with undercutting 5 mil lines and ruining the PWB.
The photoresist imaging step further requires that the copper surface be free of minute scratches which could cause the photoresist to bridge over top and thereby be undercut by the etchant. Additionally, any speck of dust can cause imperfections in the photoresist patterns extending well beyond the size of the particle.
The use of additive circuitry has been used in the prior art to circumvent the problems associated with etching fine lines from copper foil. Additive circuits are formed on an insulation substrate generally flat panel, wherein the unclad substrate is electroless plated overall with a thin conductive layer, then photopatterned with a plating resist pattern covering part of the plating to define the primary circuit wiring pattern. The exposed plating is then electroplated to increase the thickness of conductors. The conductors are then permanently defined by removing the plating resist and etching the thin layer of electroless copper now resident between the conductors. This type is known as semi-additive, in that electroplating is used.
Fully additive circuits are made in the prior art by using a seeded flat panel base laminate, which catalyses the insulation making it receptive to electroless copper deposition, thereby permitting conductors to be formed by imaging a permanent plating resist onto the base laminate. When electroless plated the conductors are formed on the base laminate only where not covered by plating resist.
With subtractive circuits, one limiting factor on reliable fine line production is the photoresist imaging step. The industry standard for high density boards is a conductor thickness of 0.0014 inches. Thus, the photoresist pattern needs to be at least 0.0014 inches thick so as to confine plated copper and prevent mushrooming onto adjacent spaces.
With available dry film photoresists having standard thickness, the resolution is practically limited to four times the photoresist thickness, indicating that 0.0056 inch conductors are the finest which can be achieved in a production environment without sacrificing yield. The dry film photoresist resolution is limited by the undercutting experienced during developing. Before unexposed photoresist can be washed out, it must first be softened by the developer solution, and during this lengthy washout cycle, the hardened photoresist is being undercut. Typically the undercutting is equal to the photoresist thickness, so that a photoresist line 0.0056 inches wide has only 0.0028 inches bonded to the substrate.
One further limitation on the production of fine lines is the fragility of the copper traces and their susceptibility to damage from handling during the manufacturing process.
In all printed wiring board manufacturing processes known to the applicant, high density wiring is achieved by making the conductors narrower in width, while maintaining the conductor thickness at the standard 0.0014 inches. Further, the circuitry is bonded to the top of the base laminate and is vulnerable to damage from scratches and abrasion prior to the solder masking step. In all known processes, the conductor width exceeds the conductor thickness by a factor of at least 2 to 1, and typically 3 to 1.
One objective of this invention is to solve these prior art problems.
Other objects, features and advantages of the invention will be found throughout the following description, claims and drawing.